When conducting research in the development of metallic structures, it is often highly desirable to compare various processing variables to determine their effect on the fatigue lifetime of the completed structure. Thus, methods of treatment of the structure, such as temperature of formation, subsequent heat treatment, alloy constituents, etc. are often compared to obtain an optimum structure. This is particularly true in research directed toward the development of metallic joints such as welded joints and, in particular, solder joints. While the present invention has broad applicability in the metallurgical field, it is of particular importance in the development of solder joints, more particularly those used in attaching various operative elements to a complex circuit board such as used in a computer.
The lifetime of any solder joint, particularly plastic leaded chip carrier solder joints, is of critical importance to the longterm operability of complex circuits which include large numbers of chips. This is particularly true when the joints, or the electronic instruments, e.g. computers, are used under conditions which may subject the joints to loads (stresses) at various times.
There are several methods now employed for testing these joints, most of which take days, months or even years to complete and yield unpredictable data. There are also some empirical formulations based on extrapolated Coffin-Manson plots. However, the results of these extrapolated test results are not related to actual use conditions, and there are no adequate mechanistic models to explain the failure mechanisms under the use conditions. Most methods employed today are related to leadless joints of high strains, not leaded joints of low strains and loads (stresses).